2997 - Lattice Diamond: How does the synthesis tool treat the unused input and output ports declared in the RTL code and not used(logic is not being assigned to the IO Ports)?

2997 - Lattice Diamond: How does the synthesis tool treat the unused input and output ports declared in the RTL code and not used(logic is not being assigned to the IO Ports)?

The synthesis tool will remove the unused Input ports declared in the design.

For unused Output ports, the tool can either tie them to the GND or leave them tri-stated. You can check this in the RTL view of the Synthesis tool.

It is recommended to assign some value to the Output ports instead of leaving them unconnected.