2513 - Can LatticeECP3 LVDS25 be driven by an LVDS18 output of a transmitter device? How about the other way around?
LVDS is an I/O signaling characterized with minimum/maximum differential
voltages along with a common mode voltage. LVDS signaling is,
therefore, independent from a supply voltage.
For an external LSVD18 transmitter to drive LatticeECP3 LVDS25:
The LatticeECP3 datasheet, DS1021 specifies that LVDS25 has a 0.0V to 2.4V allowed input-level range (Vinp, Vinm) with 100mV minimum differential voltage (Vthd) and the common mode voltage (Vcm) locatable anywhere between 0.05V to 2.35V. Therefore, there should be no problem for a LatticeECP3 LVDS25 input to be interfaced with an LVDS18 output.
For LatticeECP3 LVDS25 to drive a receiver device LVDS18 input:
According to the LatticeECP3 datasheet, DS1021, LatticeECP3 LVDS25, in a typical case, drives 1.03V to 1.38V (Voh, Vol) with 350mV differential voltage, and offset voltage 1.2V (Vos). As long as the receiver device's LVDS18 input characteristics safely accept LatticeECP3's LVDS25 output, this connection should be no problem in general. Note that you will need to check if the receiver device's LVDS18 input requirements support the following minimum and maximum cases of LatticeECP3 LVDS25 output specified in the datasheet.
Vol(min) = 0.9V, Voh(max) = 1.6V
Vod(min) = 250mV, Vod(max) = 450mV
Vos(min) = 1.125V, Vos(max) = 1.375V
See the LVDS25 Over Recommended Operating Conditions table under the sysI/O Differential Electrical Characteristics section in the LatticeECP3 datasheet, DS1021 for complete related specifications.
Related Articles
880 - The LatticeXP2 device does not have a sub-LVDS output type, can I still drive sub-LVDS inputs with the LatticeXP2? <BR>
Situation: An application uses the LatticeXP2 device and needs the sub-LVDS output type. Solution: Given that sub-LVDS signaling requires Vod from 100mv (min) to 200mv (max) and Vcm from +0.75v (min) to +1.05v (max), the sub-LVDS output type can be ...
879 - LatticeXP2: How can I drive mini-LVDS output on LatticeXP2 if mini-LVDS IO standard is not available? <br>
If user's design is using 50 ohm PCB trace and cable impedances, user can set the LatticeXP2 IO output type to LVDS and this will produce 400mv peak signal swing at the receiver's 100 ohm termination with proper common mode output voltage. The ...
725 - Does the MachXO device family support true LVDS buffers?<br>
The larger two devices (LCMXO1200 & LCMXO2280) in the MachXO family support True LVDS I/O. To set up "true LVDS" on the input side, connect a 100 ohm terminating resistor across the 'true' and 'compliment' input terminals. On the output side, no ...
2676 - ECP3: Can output enable signal be used for 7:1 LVDS design?<br>
For 7:1 LVDS design, it is usually used for unidirectional video data transfer. In Lattice's related reference designs -- RD1030/etc., data is driven to LVDS output pads through Output Buffer (OB) primitive To temporarily shut down the LVDS output ...
6323 - MachXO3: Can the HCSL to LVDS Translation be done in MachXO3 Device?
The MachXO3 can accept with HCSL output when either internal or external parallel termination is ON, so that can convert the current drive to voltage drive, and our differential input buffer can detect the 0/1. And then, the user can use true LVDS to ...