1653 - LatticeECP3: Does the PLL (Phase Locked Loop) require a reset after making changes to the Dynamic Phase and Dynamic Duty Cycle Adjustment features?

1653 - LatticeECP3: Does the PLL (Phase Locked Loop) require a reset after making changes to the Dynamic Phase and Dynamic Duty Cycle Adjustment features?

No, a reset is not required to the PLL after making a dynamic phase or duty cycle adjustment change.  These features are not included in the PLL loop and are only on the output of the CLKOS port.  The CLKOP port is used as the feedback port on this PLL and changes to the CLKOS port will not impact the PLL.  

However, it should be noted that making changes to the dynamic phase and duty cycle adjustment features can create a glitch on the CLKOS output port.  The user needs to be aware of this to make sure it is handled in the design.