Configuration / Programming / Security | IP (ESB, CRE, SFB, ESFB)

IP (ESB, CRE, SFB, ESFB)
7067 - CRE Module IP: How to check and compute the HMAC-SHA256 value generated by CRE Module IP?
User may use conventional online OpenSSL or HMAC generator to calculate the HMAC-SHA256 value. However, few things to take note with OpenSSL vs Online HMAC generator: 1. Online HMAC generator key is in string format while OpenSSL can be either hex or ...
6959 - MachXO3D: How are status and errors reported in TRNG( True Random Numbers Generator ) Feature?
The TRNG check can be implemented in soft IP (fabric), including status and error reporting.
6958 - MachXO3D: Does the raw TRNG output always go through SHA-256 as a conditioner?
Yes, for the customer side only. The customer API for our customers ALWAYS goes thru SHA-256 as a conditioner/whitener.
6957 - MachXO3D: What is the architecture of TRNG( True Random Number Generator ) Feature?
The TRNG feature architecture is a Hardware-based entropy source for true random data.
6956 - MachXO3D: Does MachXO3D claim to be IID (Independent and Identically Distributed)?
The MachXO3D is a Non-IID.

Popular Articles
7743 - How to implement Gigabit Ethernet in Certus-NX, CertusPro-NX, MachXO5-NX and CrossLink-NX FPGAs?
Lattice currently recommends the following for implementing Gigabit Ethernet interfaces: CertusPro-NX FPGAs: Use SERDES-based SGMII or RGMII Certus-NX, MachXO5-NX, and CrossLink-NX: Use RGMII These recommendations are based on updated LVDS-based ...
What to Expect from Lattice Support?
Lattice Technical Support Expectation Please be advised that highest priority for Lattice Technical Support will be given to 1. Software which is not working as expected or suspected bugs. We recommend that customers use the latest software tools and ...
6485 - Lattice Radiant: What is Glitchfilter in Device constraint editor?
Glitch Fliter is used to prevent short-duration events of glitches, This is used to prevent False tripping on noise in a system. GLITCHFilter in device constraints , enables 1ns glitch filtering.
7148 - Simulation error: 'Failed to find GSR_INST' in hierarchical name 'GSR_INST.GSROUTE'
Description: In simulating designs for Lattice devices under Lattice Radiant, this error may appear if there is no GSR instantiated in the testbench. Solution: There is no planned fix for this simulation issue. To work around this, please instantiate ...
6114 - Crosslink NX : Are there any Reference Designs of DPHY for different applications as stated below? 1. Connecting Soft DPHY Rx module output to Soft DPHY Tx module input. 2. Image acquisition from a camera through Hard DPHY.
Solution: The following RDs available for Crosslink-NX will support the said applications: 1. FPGA-RD-02212 : N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation - Aggregate multiple Image Sensors into a single Output with Minimal Latency. - Uses ...

Configuration / Programming / Security | IP (ESB, CRE, SFB, ESFB) | Knowledge Base

IP (ESB, CRE, SFB, ESFB)

7067 - CRE Module IP: How to check and compute the HMAC-SHA256 value generated by CRE Module IP?

6959 - MachXO3D: How are status and errors reported in TRNG( True Random Numbers Generator ) Feature?

6958 - MachXO3D: Does the raw TRNG output always go through SHA-256 as a conditioner?

6957 - MachXO3D: What is the architecture of TRNG( True Random Number Generator ) Feature?

6956 - MachXO3D: Does MachXO3D claim to be IID (Independent and Identically Distributed)?

Popular Articles

7743 - How to implement Gigabit Ethernet in Certus-NX, CertusPro-NX, MachXO5-NX and CrossLink-NX FPGAs?

What to Expect from Lattice Support?

6485 - Lattice Radiant: What is Glitchfilter in Device constraint editor?

7148 - Simulation error: 'Failed to find GSR_INST' in hierarchical name 'GSR_INST.GSROUTE'

6114 - Crosslink NX : Are there any Reference Designs of DPHY for different applications as stated below? 1. Connecting Soft DPHY Rx module output to Soft DPHY Tx module input. 2. Image acquisition from a camera through Hard DPHY.