7788 - What are the recommendations for performing Fast Corner Timing Analysis on Certus-NX, CertusPro-NX, MachXO5-NX, and CrossLink-NX FPGAs

7788 - What are the recommendations for performing Fast Corner Timing Analysis on Certus-NX, CertusPro-NX, MachXO5-NX, and CrossLink-NX FPGAs

Context

The default settings for Timing Analysis of the Nexus platform in Radiant 2025.2 were updated to use VccMAX for fast corner thold timing analysis.

Why VccMAX?

Using VccMAX for fast-corner thold analysis provides a more accurate representation of device behavior under worst-case conditions. Using VccMax for fast corner Thold analysis ensures timing closure is achieved under conditions that are most representative of worst-case conditions, improving design robustness.

No Silicon/Timing Model Changes

There are no changes to the silicon or the underlying timing models for Nexus families. The only change is how the timing model is used by the STA tool.

Impact

Designs that used the default timing analysis settings in Radiant releases prior to Radiant 2025.2 used VccMin for fast corner thold analysis which may not represent the worst case operating conditions.

Mitigation

For Designs in development:

Lattice recommends that designs that are in development use the Radiant 2025.2 release or later for development and timing closure sign off.

For Designs in Pre-Production:

If a design is in the final stages of sign-off before going to production and the schedule does not permit migrating the design to Radiant 2025.2 for sign-off, it is recommended that the final Place and Route design database (UDB) be imported into Radiant 2025.2 using the timing TCL command to perform timing analysis on the design.

For example,
timing design_in_preprod.udb -v 10 -o output_2025_2.twr

 If the design passes timing, then the bitstream from the earlier release can be deployed for production. If the design fails timing, it is recommended to migrate and close timing on the design in Radiant 2025.2 or a later release.

For Designs in Production:

If a design is in production and is experiencing functional issues in the deployed system, it is recommended that the final Place and Route design database (UDB) be imported into Radiant 2025.2 using the timing TCL command to perform timing analysis on the design.

For example,
timing design_in_prod.udb -v 10 -o output_2025_2.twr

If the design passes timing, then no further timing analysis action is required. If the design fails timing, it is recommended to migrate and close timing on the design in Radiant 2025.2 or a later release

Summary Table

Project Stage

Recommendation

In Development

Use Radiant 2025.2 or later for all timing sign-off

In Pre-Production

Import final PAR database into R2025.2 and rerun timing on R2025.2 using timing TCL

In Production

If any functional issues arise on HW, re-run timing in R2025.2 using timing TCL

Note: If the design is old and the UDB file was generated many Radiant versions ago, several device updates could have been introduced that would contend with the current device database. Thus, we would recommend regenerating the UDB file.

For further guidance, you may file a Technical Support ticket.