When working with high-speed digital interfaces, signal integrity is critical to ensure reliable operation. The MachXO5-NX family of FPGA devices includes specific specifications for overshoot and undershoot on input pins, which are essential to maintain long-term reliability and prevent damage to the device. Customers often have questions about how these specifications are defined, particularly regarding the use of Unit Interval (UI) and the interpretation of percentage-based timing limits. This article clarifies these concepts using real-world examples and provides a clear framework for evaluating compliance with the overshoot/undershoot specifications.
A common point of confusion lies in understanding what Unit Interval (UI) means in the context of the overshoot/undershoot table. The UI is not a fixed time value—it is derived from the input signal’s frequency. Specifically, UI = 1 / f, where f is the frequency of the periodic square wave applied to the input pin.
For example, if a 500 kHz square wave is applied, the period of the signal is:
UI = 1 / 500 kHz = 2 µs
This 2 µs value becomes the reference for all timing measurements in the overshoot/undershoot table. The table expresses allowable overshoot or undershoot durations as a percentage of this UI, but only when the UI is less than 20 µs. This means the specification applies only to signals with frequencies higher than 50 kHz (since 1 / 20 µs = 50 kHz). For slower signals, the timing constraints do not apply in the same way.
The overshoot/undershoot table in the MachXO5-NX datasheet defines the maximum allowable duration for a signal to remain outside the nominal VCCIO level. The values are expressed as a percentage of UI, and the table is only valid for UI < 20 µs. This ensures that the timing constraints are meaningful for high-speed applications.
Let’s break down how to use the table with two practical examples.
Consider a 2.5 V square wave input at 500 kHz (UI = 2 µs). The measured overshoot reaches 3.31 V and lasts for 1 µs.
Since the actual overshoot duration (1 µs) is significantly longer than the allowed 0.204 µs, this signal does not comply with the specification, even though the peak voltage (3.31 V) is below the absolute maximum input voltage of 3.63 V.
This highlights a key point: compliance with the overshoot/undershoot table is independent of the absolute voltage limit. A signal may stay within the absolute maximum rating but still violate the timing specification, which can lead to long-term reliability issues.
Now consider the same 500 kHz input (UI = 2 µs), but this time the overshoot reaches 2.92 V and lasts for 1.75 µs.
Since the observed overshoot duration (1.75 µs) is less than the 2 µs limit, this signal is acceptable and complies with the specification.
This example demonstrates that the percentage-based allowance is not arbitrary—it scales with the signal speed. Faster signals (shorter UI) have tighter timing constraints, while slower signals (longer UI) allow more time for overshoot to decay, provided the UI remains under 20 µs.
A frequent question is whether the pulse bandwidth for overshoot/undershoot is equal to 20 µs. The answer is no—20 µs is not a bandwidth value, but rather a threshold for applicability of the overshoot/undershoot table.
This means that for low-frequency signals, the device may tolerate longer overshoot durations, but designers should still ensure that the peak voltage remains within the absolute maximum ratings (e.g., 3.63 V for 3.3V-capable banks).