Diamond: How to export the content of Hierarchy Post Map Resources?

• Related Articles

• ECP5 / Diamond 3.14: Why does my design get a Map device oversize error related to PLL for LFE5U-12F in with Diamond 3.14, but completes map successfully in earlier releases of Diamond software?

  In Diamond version 3.14, there is a bug where it incorrectly limits the number of PLLs in the device to 0 for LFE5U-12F. Example error message: ERROR - (device oversize error). The number of PLL components needed (1) exceeds the number available. ...

• Lattice Diamond: What is the meaning between black and green IC Icon in the Post Map Resources?

  The Black icon means either the design is encrypted or it can be a macro. Simply saying that it is a blackbox. Green means you can view the source.

• 1048 - Lattice Diamond: Synthesis: Synplify Pro: How to change the type of memory resources Synplify Pro uses when using inferred memory in HDL code?<br>

  Lattice Diamond: Synthesis: Synplify Pro: In many cases HDL code that infers a memory is implemented as EBR-based memory. This can cause issues for a customer who needs to be able to reset this memory to zero during operation. The Synplify compiler ...

• 7472 - Diamond 3.13 and below: warning occurs when generating VHDL simulation file WARNING - Duplicate names of DEFAULT at hierarchy level (-1) for type (Keyword) exist in the source design. Any names following the first will be uniquified.

  Description: When generating a post-synthesis VHDL simulation file in Diamond, the warning below will occur: "WARNING - Duplicate names of DEFAULT at hierarchy level (-1) for type (Keyword) exist in the source design. Any names following the first ...

• 1579 - Diamond: How does user run post-route simulations for multiple devices?

  When running post-route simulations for multiple devices, the modules names in the post-route simulation netlist must be unique for each device in order to avoid simulation conflicts. Lattice design software supports this capability by allowing users ...