5192 - CrossLink: What is the boot up sequence time for CrossLink when booting up from NVCM/SPI PROM?
If booting up from internal NVCM, the sequence of events after power up is provided below (Note: Timing numbers are prorated from full chip simulation.):
1. After the analog POR is triggered at around 800 mv for Vcc and 1.5 V for Vccio, digital delay for 5 ms till Vcc and Vccio reach minimal operation level at worst case ramp rate.
2. Initialization at 8 MHz (limited by NVCM performance), including PPT, CDM and SRAM Bulk Erase ~15.4 ms.
3. Bitstream downloading at 24 MHz ~60.6 ms. The bitstream has to restore the SMCLK from 8 MHz to 24 MHz which is limited by NVCM reading performance.
So the overall wakeup time is ~76 ms to ~80 ms, depending on the power supply ramping rate.
If booting up from external SPI PROM, there is no NVCM reading limitation. The Master SPI can be set to run at 48 MHz max. Thus, start at low speed and change to 48 MHz at the beginning of the bitstream. So the bitstream download time can be reduced to about 36.9 ms. Then the overall wake-up time can be ~52.3 ms to 56 ms, depending on the power supply ramping rate.
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