3612 - LatticeECP3: Is Lattice ECP3 device PCISIG (Peripheral Component Interconnect Special Interest Group) compliant in terms of Differential peak-to-peak input voltage (VRX-DIFF_P-P)?

3612 - LatticeECP3: Is Lattice ECP3 device PCISIG (Peripheral Component Interconnect Special Interest Group) compliant in terms of Differential peak-to-peak input voltage (VRX-DIFF_P-P)?

Our Lattice ECP3 device is PCISIG compliant and passed PCISIG compliance tests at PCISIG workshop.

The PCI Express Electrical and Timing Characteristics of our ECP3 datasheet says that the minimum value for Differential peak-to-peak input voltage (VRX-DIFF_P-P) is 340 mV and is not in compliance with PCISIG specifications.

The PCISIG specification says that the Differential peak-to-peak input voltage (VRX-DIFF_P-P) is from 175 mV to 1.2 V which is not supported by Lattice ECP3 device in the minimum value.

However, as per PCISIG standards, the Transmitter Differential Peak to Peak Output Voltage (VTX-DIFFp-p) should be in between 800mV to 1.2 V. So, the minimum range specified as per the PCISIG specification falls under our receive voltage level (>340 mV). So, our Lattice ECP3 device can sense the incoming signal from the far end transmitter.

Also, PCISIG compliance does not check Rx. The PCISIG compliance test consists of 2 parts:

1. Tx electrical

2. Interoperability.

In Tx electrical tests, PCISIG does not test Rx side.

In Interoperability, the test usually is tested on a plug-in card, with minimum attenuation from the Tx driver, so the Rx side is normally not stressed.

This is how our ECP3 device is always PCISIG compliant.