2990 - MachXO2: If MachXO2 is in the Feature Row Hardware Default Mode state (erased state) and PROGRAMN is held LOW, then would the device block the JTAG port from accessing the internal flash, or block the access to other devices in the JTAG chain?
Definition:
No, the device will not block the JTAG from either accessing the internal Flash or accessing the other devices in the JTAG chain. The PROGRAMN pin is transition sensitive, and not level sensitive.
Related Articles
1409 - How can I access the User Flash Memory(UFM) of MACHXO2 device?
You can access the User Flash Memory(UFM) sector via the internal WISHBONE interface of the Embedded Function Block(EFB) module, external Slave SPI port and exteranl I2C Primary port. In addition, you can also access the UFM sector through the JTAG ...
1423 - Can I access the on-chip Flash memory use the Master SPI Mode(MSPI) for MACHXO2 device?
You can not use the Master SPI Mode(MSPI) to access the on-chip Flash memory. This mode is exclusively for SRAM memory configuration. You can use the MSPI port for programming the external SPI Flash device through JTAG mode. This provides a single ...
1323 - Is PROGRAMN pin independent of JTAG programming operations?
The PROGRAMN pin does not affect the JTAG state machine or boundary scan cells. However, the PROGRAMN pin does clear the SRAM configuration memory of the device. Because of this, a logic low signal on PROGRAMN pin at any time during JTAG ...
6179 - How do user program Lattice FPGA after programming a bitstream to the SPI Flash with JTAG_PORT and MASTER_SPI_PORT set to DISABLED?
Description: When JTAG_PORT and MASTER_SPI_PORT is set to DISABLED, user can no longer access the configuration logic through JTAG and MSPI Port. Thus, user can't perform programming with the interface. Solution: To workaround on this, user can ...
5304 - All Devices: Can we access any NON-JTAG port (Wishbone, I2C, SPI or CPU) while SED is running in user mode?
No. While the SED is running if the user tries to access the device using any non-jtag port (like WB, I2C, SPI or CPU) the SED will be terminated.