2810 - With the iCE40 device,why do I see more LUTs utilized in my design than actually required?

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• 655 - How is the Global Set Reset (GSR) used in a design? Do I need to use the GSR symbol or component in my design to use the GSRN pin for the MachXO device?

  For the Lattice MachXO device, all the registers in the device will be reset upon power-up of the device, provided the power-up sequence is clean. This will happen without any additional effort on the part of the user. The software will evaluate the ...

• 3829 - In an iCE40LP-CM81 device, can an internal oscillator be used as a clock source in the RTL design?

  An internal oscillator can not be used as a clock source in the RTL design. It is only used for the device configuration.

• 1011 - Does each quadrant of the device have equal logic resources?

  The answer is no. Clock trees are placed by quadrants, but LUTs are placed according to available space. In the ECP2M devices, the SERDES alone can take up to 1/4 of a quadrant. Thus, there is less logic resources physically present in that quadrant ...

• 1758 - MachXO2: Can the MachXO2 device support PCI-compliant signaling on any GPIO?<br>

  Yes. However, there are considerations to keep in mind when choosing pins. The MachXO2 implements two aspects of PCI buffers independently: PCI-level compliant inputs/outputs PCI complaint internal clamps. MachXO2 implements PCI-level compliant ...

• 1605 - Does default IO behavior change from device family to device family?<BR>

  The IO behavior of each Lattice device family could be unique. Some of the device families support pull and bus keeper circuitry for each individual pin, some support such function on a global basis, while others have different pull condition for ...