2436 - latticeXP2: What methods are available to initiate configuration for the LatticeXP2?
Solution:The LatticeXP2 device has several methods to initialize the device that is controlled by the CFG[1:0] pins.
When the CFG0 pin is high, the device will configure itself by reading the data stored in on-chip Flash; this is
referred to as SDM, or Self Download Mode. It will configure itself upon power up or power cycling.
If the CFG0 pin is low, the device will read the CFG1 pin to determine which optional boot mode to enter. When CFG1 is low the device will first attempt to configure the SRAM using Master SPI mode with the external SPI Flash port. If this fails then the device will configure itself from the on-chip Flash if a configuration file is stored
there.
When CFG1 is high the device will first attempt to configure the SRAM using on-chip Flash. If a configuration file is not stored there then the device will configure itself using Master SPI mode with the external SPI Flash port.
The boot sequence is defined by the settings of the CFG pins having several options to initialize or reinitialize the configuration.
1) A power up or power cycle will initiate programming from either the embedded flash memory or the external SPI flash or visa-versa. 2) Toggling the PROGRAMN pin will initiate configuration when the CFG0 pin is set low. 3) Other initialization options include commanding Refresh through either JTAG or Slave SPI ports. REFRESH is similar to toggling PROGRAMN. This command can be done anytime through JTAG TAP pins. However, the SSPI port is only available when the SSPI port available (persisted).
More information is available in the LatticeXP2 sysCONFIG Usage Guide, TN1141.