2212 - ECP3: Is there a way to actively select the configuration bitstream the LatticeECP3 loads from the attached SPI memory?
Solution:
The LatticeECP3 SPI master configuration logic can be manipulated to
provide active control over one of two configuration bitstreams stored
in an external SPI memory. A framework for performing this function for
the LatticeECP2M is described in TN1216. The process described in TN1216
needs to be modified slightly for the LatticeECP3.
The procedure is a modification of the LatticeECP3's SPI Multiboot mode. Two bitstreams must be programmed into the SPI memory. The boot image to be loaded can be controlled by modification of the CFG2:0 pins. Read TN1216 and modify the flow as follows:
- Place a JUMP instruction in Sector 0 pointing to the "Golden" image
- Set CFG2:0 for SPI Master load
- Assert PROGRAMn, or transmit a REFRESH command via JTAG or Slave SPI
- The FPGA reads the JUMP instruction and loads the "Golden" image
To choose the alternate configuration:
- Place a JUMP instruction at address 0xFFFF00 pointing to the "Primary" image
- Set CFG2:0 for SPIm load
- Assert PROGRAMn, or transmit a REFRESH command
- The FPGA reads the JUMP instruction and loads the "Primary" image
This permits a controlled selection of the boot image for the ECP3. Read LatticeECP2/M and LatticeECP3 Dual Boot Feature (TN1216) to know about the dual boot functionality of the LatticeECP3.