1071 - How to resolve simultaneous switching output (SSO) ground bounce problems/simultaneous switching output sso ground bounce vcc droop noise
As a workaround, user may try the following guideline to reduce SSO noise:
1. Add decoupling capacitors for all VCC/GND Pairs.
2. Place the decoupling capacitors as close as possible to the power and ground
pins of the device. Put small capacitors close in, and large capacitors as you get further out.
3. Configure the unused I/O pin as an output pin and then drive the output low. This
configuration acts as a virtual ground. Connect this low driving output pin to the
board's ground plane. Creating these programmable grounds next to switching pins
further reduces ground bounce.
4. When the speed is not critical, turn on the Slow Slew Rate.
5. Limit the load capacitance and reduce the output drive strength.
6. Reduce the number of outputs that can switch simultaneously and/or distribute
them evenly throughout the device. Follow the simultaneous switching guidelines
described in the section above. Take particular care in placing them near GND/VCC/Virtual ground pins
7. Move switching outputs close to a package ground pin.
8. Create synchronous designs that will not be affected by momentarily switching pins.
9. Use a large via size to connect the capacitor pad to the power and ground plane
to minimize the inductance in decoupling capacitors.
10. Use the wide and short trace between the via and the capacitor pad or place the via adjacent to the capacitor pad.
11. Use surface mount capacitors to minimize the lead inductance
12. Use low effective series resistance (ESR) capacitors. The ESR should be <400 ohms.
13. Each GND pin/via should be connected to the Ground Plane