7792 - Radiant: Why does the VHDL testbench template generator in Radiant 2025.2 fail and show errors?

The VHDL testbench template generator utility in Radiant 2025.2 may fail to generate a testbench and flags errors. These errors are not caused by the user’s design and should be ignored. This only affects VHDL testbench generation. Verilog designs have no issues in generating testbench templates.

A patch is available to fix this issue on Windows and Linux OS and can be downloaded here: https://latticesemi.files.com/f/b3b3c27222a75235

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7792 - Radiant: Why does the VHDL testbench template generator in Radiant 2025.2 fail and show errors?

7792 - Radiant: Why does the VHDL testbench template generator in Radiant 2025.2 fail and show errors?

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