How to use Reveal with Soft JTAG in Radiant?

How to use Reveal with Soft JTAG in Radiant?

Users have the option to use Soft JTAG for Reveal debugging. This will use GPIO pins for the four JTAG pins (JTAG_TCK, JTAG_TDI, JTAG_TMS, and JTAG_TDO). This method can also serve as a workaround in case there is an issue with Hard JTAG. 

You can set the JTAG Implementation in Reveal Inserter. Right-click the Reveal core > JTAG Interface > Soft JTAG. 

Assuming you have a project with Reveal via Soft JTAG already inserted, the next steps are as follows:

Assigning the JTAG pins

Notes
Make sure the Reveal file is active. The name of the Reveal file will be highlighted in bold if it is active. If not active, you can right-click the Reveal file and choose ‘Set as Active Debug File’ to make the file active. 
  • Run Synthesis.
  • Open the Device Constraint Editor > Port, then assign the dedicated JTAG pins to the SOFT JTAG ports of the device. The same can be done by manually modifying the post-synthesis constraint file.
    If you encounter an error after saving the pin assignment, it may be due to the JTAG_PORT being enabled. To disable this, go to Device Constraint Editor > Global, then set JTAG_PORT to DISABLE.
    Save your settings then close the Device Constraint Editor window.
  • Re-run synthesis. 
  • Continue the design flow and generate a bitstream. 
Notes
Make sure that the pins used for Reveal are not being used by other components to avoid contention. JTAG pins will be removed if Reveal is made inactive

Programming the FPGA

Reveal Analyzer requires the design with Reveal Inserter running on the device. Hence, we must first program the device before running Reveal Analyzer.
  • Open the Programmer (via Tools > Programmer, or click the Programmer icon).
  • Connect the USB cable (both 2A and 2B cables will work).
  • Connect the TCK, TDI, TDO, and TMS wires of the USBN-2A/2B cable as per the pin assignments on the board.  Also, connect the GND and VCC of the cable to the ground pin and bank VCCIO pin of the device.
  • Connect the FPGA's JTAG_EN pin to GND. This is essential to disable the hard JTAG. 
Notes
If there was a previous run on Radiant Programmer to configure a device, then the user may need to open Windows Task Manager and end the cableserver.exe process to allow Reveal Analyzer to access the USB cable.

Using Reveal Analyzer

After programming the device, we can go back to Diamond for Reveal Analyzer. 
  1. If you have an existing Reveal Analyzer (*.rva) file, open it. Else, create a new Reveal Analyzer by clicking on the icon of Reveal Analyzer or going to Tools > Reveal Analyzer.
  2. Detect the USB port. This should automatically detect the correct USB device you are using. If it does not, manually select the correct device through the drop-down menu.
  3. Specify the RVL source file (*.rvl) by clicking 'Browse...'.
  4. Click 'OK'.
Notes
Do not use 'Scan' function with softJTAG.  The softJTAG interface does not have access to configuration logic, so there are no programming and scanning functions available (source:  Reveal User Guide).
Reveal Analyzer should launch and work properly.

For more information, please refer to the Reveal User Guide from the Start Page of the Lattice Diamond tool.