6789 - How can prohibiting the usage of dedicated clock resources help solve hold timing violations?

Primary/Secondary routing resources have less delay and low skew compared to local/general routing.

One of the reasons for having a hold violation is that the data path is reaching the latch/end/capture flop faster than the clock path. When primary/secondary resources are prohibited, this means it will use local/general routing resources. This adds delay to the data path, thus fixing the hold violation.

But this can only be a possible solution if the fixing of the hold violations does not cause setup violations. Meaning there is quite some margin on setup initially.

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6789 - How can prohibiting the usage of dedicated clock resources help solve hold timing violations?

6789 - How can prohibiting the usage of dedicated clock resources help solve hold timing violations?

Related Articles

7263 - Lattice Diamond: Are the hold window analysis violations observed on the Timing Analysis View valid timing violations? Do users need to make sure that these are passing even though they are not blocking bitstream generation?

6598 - Diamond: How do we solve timing violations from Dual Clock FIFOs or other memory modules?

6771 - Radiant 2023.2 SP1 or earlier: How can user handle clock-domain-crossing (CDC) paths timing violations between rvlclk and another clock of the design (clk)?

1993 - Diamond: Why does the place and route tool not fix hold violation for the design despite Auto Hold-Time Correction being set to "On"?

7021 - All Nexus / Radiant 2023.1 and older: How can the user calculate the Clock-To-Out (min and max) values and Input setup/hold values of the I/O Timing Analysis report?