[ECP5] Lattice Diamond: Issue encountered during IP generation using VHDL. ERROR - Error Trying to create component

To workaround this issue, user need to change the synthesis tool from Lattice LSE to Synplify Pro.

Steps in changing the synthesis tool:

1.Go to Project.

2. Select Active Implementation.

3. Choose Select Synthesis tool.

4. At Synthesis tool select synplify pro as its value.

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[ECP5] Lattice Diamond: Issue encountered during IP generation using VHDL. ERROR - Error Trying to create component

[ECP5] Lattice Diamond: Issue encountered during IP generation using VHDL. ERROR - Error Trying to create component

Related Articles

ECP5 / Diamond 3.14: Why does my design get a Map device oversize error related to PLL for LFE5U-12F in with Diamond 3.14, but completes map successfully in earlier releases of Diamond software?

Diamond 3.12: Why is it that error was detected when using VHDL 2008 with Reveal?&nbsp;<div><br></div>

3666 - LatticeXP2: Does Lattice&nbsp;provide a Fast Fourier Transform (FFT) Compiler IP Core with VHDL as the target language in Lattice Diamond Tool?

Lattice Diamond: Does Lattice recommend porting/converting of IP from different device with different IP version?

115 - Active-HDL error: "ELAB2_0093" in mixed Verilog/VHDL design

Diamond 3.12: Why is it that error was detected when using VHDL 2008 with Reveal? <div><br></div>

3666 - LatticeXP2: Does Lattice provide a Fast Fourier Transform (FFT) Compiler IP Core with VHDL as the target language in Lattice Diamond Tool?