6513 - Lattice Diamond: How do i set multiple verilog include directories on my design?

6513 - Lattice Diamond: How do i set multiple verilog include directories on my design?

You can add multiple directories in the "Verilog Include Search Path" in Design implementation, you can define them as (Example): C:/Users/cmeala/Desktop/CASES/Include Case/Path1;C:/Users/cmeala/Desktop/CASES/Include Case/Path2 then try using `include "filename.v" in your input files.