DisplayPort IP RX 8.1G Unable to Achieve Interlane Alignment

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• DisplayPort IP RX Intermittent Interlane Alignment Loss of Lock for TPS2

  Description: When TPS2 is used during link training, intermittent occurrences have been observed where the DisplayPort IP internal deskew logic latches onto an incorrect test pattern alignment and is unable to recover. As a result, the DisplayPort IP ...

• DisplayPort RX IP does not support backpressure

  Description: DisplayPort RX IP does not support backpressure. The IP continues to output data even when the downstream tready signal is deasserted. Resolution: A shallow buffer will be introduced in a future IP release to handle occasional tready ...

• DisplayPort TX IP unable to handle I2C_DEFER and I2C_NACK

  Description: The DisplayPort IP is not able to respond to I2C_DEFER and I2C_NACK correctly. Resolution: This will be fixed in the next DisplayPort IP release.

• DisplayPort IP resolutions must be divisible by 4

  Description: The DisplayPort IP may not be able to handle custom resolutions that are not divisible by 4 (i.e., 1366x768). This applies to both the RX and TX of DisplayPort IP. Resolution: This will be fixed in the next DisplayPort IP release.

• DisplayPort RX IP returns AUX_ACK instead of AUX_NACK when writing to an unsupported DPCD address

  Description: The DisplayPort IP generates an illegal response to an AUX request when accessing a reserved DPCD address. The DisplayPort RX IP should return AUX_NACK when writing to an unsupported DPCD address, but the design responds with AUX_ACK. ...