Description:
To set the location of the desired HARD DPHY module via Radiant, do the following procedures:
(1) Create a top module either using verilog or vhdl source code.
(2) Under the top module, insert the synthesis loc = DPHY1 inside the instantiation of DPHY.
example (verilog):
dphy_1 dphy_inst (
.hs_data_des_en_i(hs_data_des_en_i),
.hs_rx_clk_en_i(hs_rx_clk_en_i),
.hs_rx_data_en_i(hs_rx_data_en_i),
.lp_rx_en_i(lp_rx_en_i),
.pd_dphy_i(pd_dphy_i),
.clk_byte_o(clk_byte_o)
)/* synthesis loc="DPHY1" */;
(3) Compile the design.
(4) Go to Tools then select Physical Designer. Check if DPHY ports is situated on site DPHY1.
Solution:
Using constraint:
(1) Add post-synthesis constraint to move the location of DPHY.
example:
For assigning to DPHY0:
ldc_set_location -site {DPHY0} [get_cells dphy_inst/lscc_mipi_dphy_inst/RECEIVER.lscc_mipi_wrapper_rx/HARD_IP.NO_CIL.u_dphy_nocil.DPHY_inst]
For assigning to DPHY1:
ldc_set_location -site {DPHY1} [get_cells dphy_inst/lscc_mipi_dphy_inst/RECEIVER.lscc_mipi_wrapper_rx/HARD_IP.NO_CIL.u_dphy_nocil.DPHY_inst]
(2) Right click the D-PHY in the viewer.
(3) Choose set LOCATE preference then re-run synthesis to PAR.
To know the exact current location of DPHY, do the following:
(1) Open the Physical Designer.
(2) Switch to Placement Mode.
(3) Select the DPHY in the instance list.
(4) Right click the box then set Locate Preference.
(5) Save the current project.
(6) Go to the constraint file and check if it propagate the ldc_set_location constraint.
Also a helpful reference: FAQ-6073