820 - What can the user do with the I2C interface on the Power Manager II devices?

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• 829 - How many I2C loads can I put on an I2C chain with Power Manager devices?

  When using the Platform Manager or Power ManagerII devices; POWR1220AT8 POWR1014A and POWR6AT6, it is important to know the loading and driving source of the full set-up. In a case where there are just a few I2C loads the designer needs to consider ...

• 6138 - [ECP5]Can Tri-Rate Serial Digital Interface (SDI) PHY IP also support ECP5 devices?

  Solution: The Tri-Rate Serial Digital Interface (SDI) PHY IP only supports ECP3 devices.

• 5546 - <div>MachXO3: How to implement SLVS Rx (Receiver) IF (interface) in MachXO3 devices?</div>

  Description: This article guides on implementing SLVS RX interface in MachXO3 devices. Solution: Since the 'IO_TYPE' cannot be set to "SLVS" in MachXO3, the LVDS25 buffer can be used to receive SLVS signals. This is because the 'differential input ...

• 4332 - MachXO3: Is DDR2/3 Memory Interface supported?

  MachXO3 devices do not support DDR2/3 memory interface. They do not have DQ/DQs pins that are required for DDR memory interface.

• 2041 - LatticeECP3: How to place DDR3 interface pins to minimize the SSO impact?

  1. Try to use the DQS groups in the middle of the (right or left) edge if the DDR3 data width does not require to use the whole edge of LatticeECP3. Avoid the corner DQS groups if possible. 2. Locate a spacer DQS group between two adjacent data DQS ...