7459 - Radiant: How do -start and -end work for -hold on multicycle constraints?
For a multicycle constraint, -start and -end indicate to which clock (launch or capture clock) the constraint is referenced. Below is an example:
Setting up the Example:
Let's say we have a path from register coutr1_reg[5] to register coutr2_0io[4]. coutr1_reg[5] is clocked by clk1 which is at 20MHz, while coutr2_0io[4] is clocked by at 40MHz.
By default, the tool will try to find the worst-case setup check and worst-case hold check for Timing Analysis. As we know, the setup check is done on the next clock edge (or 1 clock period) of the capture clock, while the hold check is done on the same capture edge of the launch edge. In this case, the setup check (RED ARROW) and hold check (GREEN ARROW) are shown.