739 - What is the default I/O state in a blank MachXO device?

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• 4045 - iCE40 : What is the default status of I/O pins before the configuration of an <em>iCE40 </em>device?

  The default status of I/O pins before the configuration of an iCE40 device is tri-stated with a weak pull-up to VCCIO.

• 1782 - MachXO: What is the&nbsp;IO state when VCC, VCCAUX reach the datasheet recommended levels but&nbsp;VCCIO has&nbsp;not?

  From the datasheet: https://www.latticesemi.com/view_document?document_id=9922 Typical I/O Behavior During Power-up The internal power-on-reset (POR) signal is deactivated when VCC and VCCAUX have reached satisfactory levels. After the POR signal is ...

• 1033 - Do the unused I/O pins need to be grounded in a device?

  Lattice devices have weak internal pull-ups on all I/Os. So the I/O pins which are not used in the design do not need to be grounded or connected anywhere. Some of Lattice devices have global setting for pull-ups on IOs like On, Off or Bus Hold, and ...

• 2516 - MachXO: What is the meaning of "I/O Tristate Voltage Applied" and "Dedicated Input Voltage Applied" specified in the Absolute Maximum Ratings section of MachXO data sheet?

  Solution: There are two cases where an IO pad is driven by an external source. One is the case of a dedicated input pad, and the other is a bi-directional IO pad in which its output can be tri-stated. The "Dedicated Input Voltage Applied" and "I/O ...

• 725 - Does the MachXO device family support true LVDS buffers?<br>

  The larger two devices (LCMXO1200 & LCMXO2280) in the MachXO family support True LVDS I/O. To set up "true LVDS" on the input side, connect a 100 ohm terminating resistor across the 'true' and 'compliment' input terminals. On the output side, no ...