7160 - iCE40 Ultra/UltraLite: What are the configurable I/O pull-up resistance values for iCE40?

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• 7178 - CertusPro-NX: Why are FPGA I/O lines "zero" by default? How to pull them to 'high' by default?

  CertusPro-NX's I/O hardware default is weak pull-down, and it cannot be changed until it is powered up and loaded with bitstream. The only way to get those lines to be 'high' by default is by adding external pull-up resistor on the PCB board.

• 1265 - Is there any non-volatile setting provided by the LatticeECP2/M to set permanent pull-up resistors on the I/O pins before the device is programmed?

  The LatticeECP2/M does not have a way to configure pull-up resistors on the I/O prior to the device being programmed. The LatticeECP2/M and LatticeSC/SCM do support hot socketing (or hot-swap). During power-up and power-down sequences, the I/Os ...

• 2005 - LatticeECP3:&nbsp; How do I select between the&nbsp;two Vol Max values 0.4V, or 0.2V&nbsp;documented in the&nbsp;LatticeECP3 device datasheet sysI/O Single-Ended DC Electrical Characteristics? &nbsp;

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• 5390 - IceCube2 / iCE40 UltraPlus: Why are there only two I/O Bank options (top and bottom bank), on the iCEcube2 chip configuration dialog when there are three I/O Banks on the iCE40 Ultra/UltraPlus device?

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