6911 - How can I use UART + JTAG access to FTDI chip on Linux?

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• 1423 - Can I access the on-chip Flash memory use the Master SPI Mode(MSPI) for MACHXO2 device?<br>

  You can not use the Master SPI Mode(MSPI) to access the on-chip Flash memory. This mode is exclusively for SRAM memory configuration. You can use the MSPI port for programming the external SPI Flash device through JTAG mode. This provides a single ...

• 6984 - MachXO5-NX Development Board: How to access the MachXO5-NX Development Board via SSPI using onboard FTDI?

  To access the MachXO5-NX Development Board via SSPI using the onboard FTDI, the user should follow the steps as described below. 1.) The MachXO5-NX Development Board Setup is shown below.

• 1763 - LatticeXP2: Can I connect the SSPIA primitive such that both the JTAG interface and the user logic in the FPGA fabric can access the SSPI Port?<quote><quote></quote></quote>

  No, it is not possible to set PERSISTENCE = ON in order to preserve the JTAG to SPI port in the configuration logic while simultaneously using the SSPIA component to access internal configuration logic from the FPGA fabric (PERSISTENCE = OFF). If ...

• 6394 - How to resolve the JTAG read/write access issue with Lattice's FPGA that uses JTAG voltage other than 3.3 V?

  Description: Device Constraint Editor Global Bank VCCIO setting for Bank0 & Bank1 "CONFIGIO_VOLTAGE_BANK0/CONFIGIO_VOLTAGE_BANK0" is set to "Auto" by default and the voltage is 3.3V. Solution: To workaround on this, user need to assign the correct ...

• 2687 - MachXO2: What is best practice for the MachXO2 Slave SPI Chip Select <b>(SN)</b>?

  The Slave SPI (SSPI) Chip Select (SN) input signal is recommended to be pulled high using an external pull-up resistor. The SSPI configuration port is the second highest in boot priority, with JTAG being the highest priority. Assertion of the SN ...