6425 - The address of Golden is optional, but the address of Primary cannot be specified. If we want to rewrite only Primary in the online configuration data update, which address should we specify?

• Related Articles

• 681 - LatticeECP2: How to setup LatticeECP2 dual boot application to load the golden bitstream instead of primary bitstream?

  Description: A dual boot application using the LatticeECP2 device has both a golden bitstream act as the golden image, and a primary bitstream act as user image which is periodically updated in SPI Flash. In a typical dual boot configuration ...

• 2438 - MachXO2: What is the XO2 Primary port I2C address "yyyxxxxx11" for, and how is it used?

  "MachXO2 Programming and Configuration Usage Guide" lists this I2C address with the description, "Resets the device programming/configuration I2C core logic ". The purpose of this command is to reset the internal I2C command processing FIFO. In the ...

• 1834 - MachXO2: When using the device in Dual-Boot configuration mode, what address should the 'Golden' bitstream image (.bit file) be stored in the external Slave-SPI device?

  The 'Golden' bitstream image must be located starting at SPI address 0x010000. If using Lattice ispVM System 18.0 or later, the starting address for the bitstream is entered in the "Starting Address" box of the 'SPI Serial Flash Device' dialog box. ...

• 3756 - iCE40: What is the effect of setting the security bit in iCE40 devices? How to verify if the security bit is set? If the security bit is not set, how to read the Non-Volatile Configuration Memory (NVCM) data?

  It is not possible to obtain the data if Non-Volatile Configuration Memory (NVCM) is programmed with the security feature for iCE40. The security feature of the iCE40 device permanently disables any reading of NVCM data from the device. To verify if ...

• 2212 - ECP3: Is there a way to actively select the configuration bitstream the LatticeECP3 loads from the attached SPI memory?

  Solution: The LatticeECP3 SPI master configuration logic can be manipulated to provide active control over one of two configuration bitstreams stored in an external SPI memory. A framework for performing this function for the LatticeECP2M is ...