Description:
One of the possible causes is that the flash is configuring the SRAM and thus causing access issue with FPGA's SRAM.
Solution:
To workaround this issue, user may try the following:
(1) Hold the PROGRAMN port to 0 (active state/asserted) via switch/pushbutton.
This will prevent the external SPI Flash to update the SRAM configuration.
(2) While holding down the PROGRAMN, perform SRAM erase.
(3) Then, perform SRAM Fast Program or SRAM Erase, Program, Verify.
(4) De-assert PROGRAMN. Now, SRAM is successfully configured with an updated bitstream.