6252 - MachXO3: Are the M-LVDS receivers for XO3L/LF either Type 1 or Type 2?

• Related Articles

• 880 - The LatticeXP2 device does not have a sub-LVDS output type, can I still drive sub-LVDS inputs with the LatticeXP2? <BR>

  Situation: An application uses the LatticeXP2 device and needs the sub-LVDS output type. Solution: Given that sub-LVDS signaling requires Vod from 100mv (min) to 200mv (max) and Vcm from +0.75v (min) to +1.05v (max), the sub-LVDS output type can be ...

• 725 - Does the MachXO device family support true LVDS buffers?<br>

  The larger two devices (LCMXO1200 & LCMXO2280) in the MachXO family support True LVDS I/O. To set up "true LVDS" on the input side, connect a 100 ohm terminating resistor across the 'true' and 'compliment' input terminals. On the output side, no ...

• 879 - LatticeXP2: How can I drive mini-LVDS output on LatticeXP2 if mini-LVDS IO standard is not available? <br>

  If user's design is using 50 ohm PCB trace and cable impedances, user can set the LatticeXP2 IO output type to LVDS and this will produce 400mv peak signal swing at the receiver's 100 ohm termination with proper common mode output voltage. The ...

• 6323 - MachXO3: Can the HCSL to LVDS Translation be done in MachXO3 Device?

  The MachXO3 can accept with HCSL output when either internal or external parallel termination is ON, so that can convert the current drive to voltage drive, and our differential input buffer can detect the 0/1. And then, the user can use true LVDS to ...

• 1965 - LatticeECP2/M:&nbsp; What do users need to consider when using the LatticeECP2/M Dynamic Clock Select (DCS)?<br>

  Documentation on LatticeECP2/M's DCS is located in page 10-29 of the LatticeECP2/M SysClock PLL/DLL Design and Usage Guide. The link to the Application note(TN1103) can be located here. One of the issues that users will run into when using the DCS is ...