6169 - ispMACH4000: What is the difference between "LVCMOS33" and "LVCMOS33_5V"?

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• 3740 - ispMACH 4000: What is the difference between "External feedback" and "internal feedback" when calculating Fmax for ispMACH 4000 devices?

  When calculating the Fmax , the following two cases are considered 1. Internal feedback 2. External feedback When the signal is fed back through the GRP (global routing pool) without going through an IO pad, it is internal feedback whereas when it is ...

• 2142 - [ispMACH 4000]: What is the reason behind the high supply transients during startup for the ispMACH 4000 device?

  High transients during startup are because of supply sequencing used on the board, resulting in temporary leakage in the I/O buffer of the device. To minimize the transient current during power-on, configure the CPLD I/Os to a pull-up or float state. ...

• 2045 - [ispMACH 4000]: I have 75 5V inputs to an ispMACH 4000 device. Which I/O type should I use between LVTTL or LVTTL_5V?

  Description: Two 5V support options, “PCI_5V” and “LVTTL_5V” were added to the supporting I/O type constraint list for the ispMACH™ 4000 device families. Since the LVTTL I/O type's maximum VIH is 3.6V, you must use the LVTTL_5V I/O type to support 5V ...

• 5835 - ispMACH 4000: Why did the ispMACH datasheet not provide rise and fall time?

  Lattice FPGA inputs are very fast, thus are very sensitive to noise, there is no Schmitt trigger or hysteresis option. A perfect monotonically rising edge could an arbitrarily slow rise time, but the reality is noisy. A good rule of thumb for the ...

• 7767 - What is the difference between PCLKT and PLLT as dedicated PLL reference clock?

  Both PCLKT and PLLT are legal pin to use as PLL reference clock however there are differences on the clock paths that should take note in designing certain applications. PCLKT Pin: Provides a direct connection to the global and regional clock ...