6024 - ECP2: About the Metastability of ECP2M and the latest FPGA

• Related Articles

• 3950 - Can I evaluate a Lattice FPGA IP without a license?

  The user can generate the bitstream for most Lattice FPGA IPs without any license, but with a "hardware timer" that enables them to use the bitstream only for a limited time before the internal timer resets. Also, the user cannot do the Timing ...

• 4669 - How to find what all Lattice IP cores are supported by Lattice FPGA families?

  User can refer "Product Selector Guide" document to check which all IP cores are supported by Lattice FPGA families. User can get the "Product Selector Guide" from respective Product page under documentation section > Information Resources > Product ...

• 5772 - Where can I find the Package Thermal Resistance value of a legacy device or a device that is not specified on the Thermal Management Technical Note (FPGA-TN-02044)?

  If not specified on the "Device/Package Thermal Resistance" section you can refer to the generic table, Table 3.1. Package Thermal Resistance. This section specifies the generic thermal resistance for legacy Generic Array Logic (GAL), CPLD, FPGA and ...

• 1264 - How to check if the hardware timer is instantiated in Lattice FPGA devices?

  Open the .ncd file generated out of Place and Route with the help of EPIC software. Now, search for the net *hardtimer*. If it is present, one can be sure that the hardware timer is instantiated in the design. If the EPIC software fails to open with ...

• 921 - How to determine lead free package option for Lattice FPGA device?

  Please refer to Environmental Information section for RoHS related information. https://www.latticesemi.com/en/Support/QualityAndReliability For lead free part numbers refer to the ordering section of the datasheet but typically the "N" denotes lead ...