5705 - Diamond 3.10 and MachXO3: How to select "N/A" when setting all banks in 3.3V and need to assign input buffers LVTTL33?

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• 2045 - [ispMACH 4000]: I have 75 5V inputs to an ispMACH 4000 device. Which I/O type should I use between LVTTL or LVTTL_5V?

  Description: Two 5V support options, “PCI_5V” and “LVTTL_5V” were added to the supporting I/O type constraint list for the ispMACH™ 4000 device families. Since the LVTTL I/O type's maximum VIH is 3.6V, you must use the LVTTL_5V I/O type to support 5V ...

• 2347 - MachXO2: Why does the Lattice software picks VCCIO bank voltages smaller than 3.3V when all my design IO buffers are of the 3.3V type?

  Description:The situation above can occur when you set your IO buffer HYSTERESIS attribute to NA. You can normally set your IO buffer HYSTERISIS attribute using one of the three methods shown below: ispLEVER software: Start the Design Planner target ...

• 725 - Does the MachXO device family support true LVDS buffers?

  The larger two devices (LCMXO1200 & LCMXO2280) in the MachXO family support True LVDS I/O. To set up "true LVDS" on the input side, connect a 100 ohm terminating resistor across the 'true' and 'compliment' input terminals. On the output side, no ...

• 2602 - ECP3: Can we assign LVCMOS33 inputs in the same bank as SSTL15 outputs for a LatticeECP3 device?

  Solution: In order to assign a 3.3V inputs to a 1.5 V bank on the top side of a LatticeECP3 device (Bank 0 and Bank1), turn off the PCICLAMP in Spreadsheet view for the respective bank. By default, the PCICLAMP is ON for all the banks and hence, ...

• 655 - How is the Global Set Reset (GSR) used in a design? Do I need to use the GSR symbol or component in my design to use the GSRN pin for the MachXO device?

  For the Lattice MachXO device, all the registers in the device will be reset upon power-up of the device, provided the power-up sequence is clean. This will happen without any additional effort on the part of the user. The software will evaluate the ...