Description:
When using the Aldec Simulator, the following errors can occur when simulating MIPI.
#KERNEL: ERROR : Fff: Clock after input divider is out of range
#KERNEL: ERROR : Fvcout: Clock before output divider is out of range
#KERNEL: ERROR : PLL won't work
Solution:
Every MIPI IP has its folder for Aldec simulation with the .do file.
For further instructions on how to locate the simulation file, refer to its individual IP user guide.
Modify the +define+PIX_CLK and +define+DPHY_CLK_PERIOD accordingly.
For example, if the Tx Line Rate is 1200 Mbps, +define+DPHY_CLK_PERIOD=834. For a 300 MHz pixel clock, +define+PIX_CLK=3334. Get the period of and express it in picoseconds.