5393 - MACHXO2: what is the condition of I/O when powered down?

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• 2516 - MachXO: What is the meaning of "I/O Tristate Voltage Applied" and "Dedicated Input Voltage Applied" specified in the Absolute Maximum Ratings section of MachXO data sheet?

  Solution: There are two cases where an IO pad is driven by an external source. One is the case of a dedicated input pad, and the other is a bi-directional IO pad in which its output can be tri-stated. The "Dedicated Input Voltage Applied" and "I/O ...

• 739 - What is the default I/O state in a blank MachXO device?

  The silicon default of a bulk-erased MachXO device is as follows: Inputs are enabled, and referenced to Vccio. Buskeepers default to pullup. Outputs are tri-stated and default to 8ma at Vccio=1.8V and slow slew.

• 246 - MachXO: How is the TSALL pin used in the MachXO?

  Solution: TSALL is a programmable IO which can be used to Tristate all IOs when asserted. To use TSALL in your design, instantiate the TSALL component as shown below: TSALL Verilog HDL Example (MachXO) TSALL   TSALL_INST (.TSALL ()); TSALL VHDL ...

• 405 - Does the VCCPROG pin have to be powered to program the Power Manager II - POWR1220AT8?

  The VCCPROG pin only needs power if the POWR1220AT8 is going to be programmed in circuit with the rest of the board powered down. This pin is provided as a programming option and should not be powered up when VCCD and VCCA are powered up. The ...

• 725 - Does the MachXO device family support true LVDS buffers?<br>

  The larger two devices (LCMXO1200 & LCMXO2280) in the MachXO family support True LVDS I/O. To set up "true LVDS" on the input side, connect a 100 ohm terminating resistor across the 'true' and 'compliment' input terminals. On the output side, no ...