4739 - Platform Manager 2 & L-ASC10

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• 5314 - Is Reveal supported with Platform Manager 2?

  Reveal is not supported in the native Platform Designer interface of Diamond. However, the Verilog can be exported from Platform Designer. The exported design can be opened as a normal Diamond project, and then Reveal can be added to that design. The ...

• 5383 - Does Lattice provide an RTL model of the L-ASC10 device to be used for simulation?

  A functional simulation model for the L-ASC10 device is already included in the Lattice Diamond Software. From the Start Page tab, click on the Platform Designer User Guide. On page 56 is a guide on simulating Platform Manager 2 designs; this ...

• 2751 - PAC Designer: Can I access the Platform Manager IN5 and IN6 CPLD inputs from I2C in a PAC-Designer logic design?

  Access for IN5 and IN6 from I2C is supported in PAC-Designer version 6.23 and later. The signals are available as inputs to the Boolean expression editor in the PAC-Designer logic view. The latest version of PAC-Designer is available at: ...

• 2625 - Platform Manager II: Is there a limit to the number of state machines implemented in the POWR1220AT8 in PAC-Designer?

  The PAC-Designer software limits the number of multiple state machines to 15. In practice the number of macrocells in the POWR1220AT8 will limit the number of state machines to much less. The number of macrocells used per state machine is strongly ...

• 520 - Lattice Power Manager: What is the recommended Programmer to be used for Power Manager II devices?

  Previously, ispVM EMBEDDED (ispVME) was recommended used for Power Manager II devices just as it is with Lattice FPGA's and PLD's. However, This tool is obsolete and is no longer recommended to be used by the customer. Instead, customer can use ...