440 - Why is hotsocketing leakage current (IDK) listed separately from other IO leakage currents in Lattice data sheets?

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• 1862 - Power Manager 2: For the open drain outputs, how much leakage current is expected?

  For digital outputs 3-14 of the POWR1014/A device the leakage current during the high state will be very low, typically 30 uA or less. During the low state, digital outputs 3-14 can sink up to 1 mA of current and will stay within the specifications ...

• 5846 - All Devices: Can Lattice FPGA IO pins be left Floating?

  Floating IO pin is not recommended. If IO pins are left floating, then the input transistors might fall outside of the saturation or cut-off region. As a result, the device could draw additional current and increase the device's power consumption. If ...

• 6502 - Certus-NX: What is the Maximum Current per bank?

  Description: The maximum 64 mA per bank (8 IO with 8 mA) applies when selecting # of IO switching simultaneously. If desired is to use 16 mA with 8 IO switching, the overall junction temperature will be 2X higher. The source and sink current will ...

• 1605 - Does default IO behavior change from device family to device family?<BR>

  The IO behavior of each Lattice device family could be unique. Some of the device families support pull and bus keeper circuitry for each individual pin, some support such function on a global basis, while others have different pull condition for ...

• 2330 - LatticeECP3: Can LatticeECP3 devices support sub-LVDS IO?

  Description: LatticeECP3 devices do not directly support sub-LVDS IO. But LatticeECP3 can support sub-LVDS IO with an external termination circuit. Please refer to Sub-LVDS Signaling Using Lattice Devices (FPGA-TN-02028) Technical Note available on ...