387 - What should I do with the LatticeECP3 DDR3 memory interface VTT termination?

Only external VTT termination should be used for LatticeECP3 DDR3. Use of LatticeECP3's internal on-die termination (ODT) is not recommended. According to the eye diagrams and simulation results from the Lattice factory tests, the recommended external resistor value is 100-120 ohms. It is encouraged that board designers perform the signal integrity simulations if possible for best resistor value in their environment. Below is a general termination guideline for LatticeECP3 DDR3 external VTT termination:

1. Placement of any external discrete resistors or resistor packs (RPACKS) is critical and must be placed within 0.6 inches of the LatticeECP3 ball.

2. 120 Ohm BGA RPACKS (CTS RT2432B7 type) are recommended for the 64- and 32-bit interfaces due to better routing and density issues. Each RPACK contains 18 resistors in a very small BGA footprint. Note that only 120, 75 and 50 ohm values are available in this package type.

3. 4x1 RPACKS (CTS 741X083101JP type) can also be used for the cases that 100 ohm value is needed without having routing/density issues.

User can also refer "DDR3 Termination Guidelines section" from TN1180.

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387 - What should I do with the LatticeECP3 DDR3 memory interface VTT termination?

387 - What should I do with the LatticeECP3 DDR3 memory interface VTT termination?

Related Articles

386 - <p>What should I do with the unused VTT pads in LatticeECP3 when external VTT termination is implemented? </p>

2637 - ECP3: Can on-chip parallel termination to V<sub>TT </sub>be used when implementing Generic DDR interface on LatticeECP3 device?

7096 - DDR: Can the "DDR_Generic" Module in Lattice Radiant and Diamond software which has DDR communication supports bidirectional input and output?

2519 - LatticeECP3 : Why does LatticeECP3 Generic DDR (Double Data Rate) design generates missing attribute errors?

2530 - Generic DDR Simulation: glitches in functional simulation, but not in timing simulations for an output DDR (Double Data Rate) interface