3664 - MachXO2: When implementing MIPI CSI2 RX interface, can Bank 2 Vccio be connected to 3.3V instead of 2.5V?

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• 5546 - <div>MachXO3: How to implement SLVS Rx (Receiver) IF (interface) in MachXO3 devices?</div>

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  Please refer to FPGA-RD-02060 Section 3, Design and Module Description. On the project file, modify the rx_dphy which is declared under rx/rx.sbx. On the Receiver section of the IP, modify the RX Interface to DSI and the Number of RX Lanes to one.

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