3621 - LatticeECP3: Is the source code for the Helion Ionos Configuration GUI (ICG) tool available for use with HDR-60 kit?

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• 1652 - LatticeECP3: What tools and IP are available for the HDR-60 evaluation board and are they free? 

  Design tools specifically for the HDR-60 evaluation board consists of the Lattice Diamond software which also includes a number of other tools within it. You can read more about the Lattice Diamond software ...

• 4087 - LatticeECP3: How to explore Aptina sensor on the HDR60 Video Camera Development Kit?

  To setup and explore the Aptina sensor on the HDR60 Video Camera Development Kit, use the Aptina Devware software. The software can access the sensor by using the Cypress chip through the lower USB Type-A connector. You can obtain a copy of the ...

• 399 - Which Lattice devices have BSDL files available?

  A BSDL (Boundary Scan Description Language) file is available for every Lattice device with a JTAG port. This file, standardized by the IEEE1149.1 specification, describes all information necessary to perform boundary scan testing. Included are ...

• 1449 - Power Manager II: Can I program Hercules Demo Board using the USB cable provided with the kit?

  Yes, you can program using the USB cable provided with the kit. Using ispVM System one can download the JEDEC file created from PAC Designer. To make devices on the Hercules Demo Board available for loading the board JTAG_SEL(SW2) pins on the board ...

• 2009 - MachXO:Which IBIS models should I use for the MachXO JTAG signal pins?

  Solution: For the JTAG input pins, use the LVCMOS input models, input threshold voltage is referenced using the VCCAUX value, and select the model that has: TCK: bus keeper = NONE TDI: bus keeper = pull up TMS: bus keeper = pull up For the JTAG ...