2848 - PAC Designer Trim Configuration: if the Profile0 mode is changed from Closed Loop Trim (CLT) to I2C, does the calculated value of resistors change?

2848 - PAC Designer Trim Configuration: if the Profile0 mode is changed from Closed Loop Trim (CLT) to I2C, does the calculated value of resistors change?

In the Trim Configuration of PAC-Designer software for the Profile0 Mode, the calculated value of resistors remains the same regardless of whether I2C or CLT is used. To have the correct resistor network between POWR1220AT8 and the DC-DC converter, you must specify the Profile0 Target Voltage and the upper/lower trimming voltage limits as Profile1/ Profile2 Target Voltage. When the Target Voltage for Profile0, Profile1, and Profile2 has been specified, the required DAC Code and the resistor network are displayed in the Trim Configuration window. Then you can select the Profile0 Mode to be I2C or CLT. In the case of CLT, the built-in close-loop trim engine ensures that DAC in the TrimCell maintains the Profile0 Target Voltage at the DC-DC converter output. In the case of I2C, you must ensure that the external controller updates the contents of the DAC Register I2C on the fly to set the trimming voltage so that Profile0 Target Voltage at the DC-DC converter output is maintained. For more information on trimming, refer to AN6074, Interfacing the Trim Output of Power/Platform Management Devices to DC-DC Converter.