2602 - ECP3: Can we assign LVCMOS33 inputs in the same bank as SSTL15 outputs for a LatticeECP3 device?<br>

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• 4773 - MachXO3: Does device support mixed voltage inputs?

  Yes, MachXO3L/MachXO3LF devices support mixed voltage for LVCMOS and LVTTL inputs.

• 2045 - [ispMACH 4000]: I have&nbsp;75 5V inputs&nbsp;to an ispMACH 4000&nbsp;device. Which I/O type should I use&nbsp;between LVTTL or LVTTL_5V?

  Description: Two 5V support options, “PCI_5V” and “LVTTL_5V” were added to the supporting I/O type constraint list for the ispMACH™ 4000 device families. Since the LVTTL I/O type's maximum VIH is 3.6V, you must use the LVTTL_5V I/O type to support 5V ...

• 1758 - MachXO2: Can the MachXO2 device support PCI-compliant signaling on any GPIO?<br>

  Yes. However, there are considerations to keep in mind when choosing pins. The MachXO2 implements two aspects of PCI buffers independently: PCI-level compliant inputs/outputs PCI complaint internal clamps. MachXO2 implements PCI-level compliant ...

• 5518 - How to instantiate differential inputs in VHDL?

  For differential inputs, users can refer to the example below: COMPONENT SB_IO IS GENERIC( PIN_TYPE : std_logic_vector(5 downto 0) := "000000"; IO_STANDARD: string := "SB_LVDS_INPUT" ); PORT( PACKAGE_PIN : in std_logic; LATCH_INPUT_VALUE : in ...

• 1100 - How can I use the complimentary outputs in Lattice FPGAs? <br>

  Most Lattice FPGA devices provide a complimentary output feature which allows a single ended buffer to provide its compliment on a different pin without using any FPGA logic resources or user routing. To enable this complimentary path the user needs ...