2118 - Lattice ECP3: Can I connect an external Low Voltage Differential Signal 2.5V (LVDS25) clock output to a Lattice ECP3 DDR3 bank which is a 1.5V VCCIO bank?

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• 1254 - How to define different VCCIO voltage in different IO bank for FPGA such as SC/ECP2/ECP2M/ECP3 devices? Why is it necessary?

  When running ispLEVER software tool, edit the project preference file *.lpf by following the example below to add these preference to set the BANK voltages to match the circuit board design and how the device is connected on board: BANK 0 VCCIO 3.3 ...

• 3881 - Is it possible with the signal 'ENABLE_OUTPUT' of the primitive SB_IO (IO primitive of the iCE40) to create a bi-directional Low Voltage Differential Signalling (LVDS) IO?

  No. the signal 'ENABLE_OUTPUT' of the primitive SB_IO (IO primitive of the iCE40) cannot be used to create a bi-directional LVDS IO. One has to use two separate pairs of IOs for LVDS Tx and LVDS Rx.

• 883 - How to change the emulated LVDS resistor network to get other output voltage levels?

  The following table lists 1% resistor values to use when the VCCIO is set to 2.5V and the IO output current setting is 8ma: Differential mV Rseries Rparallel 191 301 118 217 261 121 266 210 127 310 178 133 357 150 140 417 124 150 478 105 162 ...

• 879 - LatticeXP2: How can I drive mini-LVDS output on LatticeXP2 if mini-LVDS IO standard is not available? <br>

  If user's design is using 50 ohm PCB trace and cable impedances, user can set the LatticeXP2 IO output type to LVDS and this will produce 400mv peak signal swing at the receiver's 100 ohm termination with proper common mode output voltage. The ...

• 880 - The LatticeXP2 device does not have a sub-LVDS output type, can I still drive sub-LVDS inputs with the LatticeXP2? <BR>

  Situation: An application uses the LatticeXP2 device and needs the sub-LVDS output type. Solution: Given that sub-LVDS signaling requires Vod from 100mv (min) to 200mv (max) and Vcm from +0.75v (min) to +1.05v (max), the sub-LVDS output type can be ...