1567 - In LatticeECP3, is it possible to change the serdes mode from 8b/10b to 10b serdes mode via the SCI on the fly when the data rates are same for both mode?

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• 968 - Do I need to regenerate the LatticeECP2M SERDES/PCSQUAD IPexpress model for different CPRI data rates. Can I instead re-write PCS registers on the fly to support different CPRI data rates?

  In a LatticeECP2M design, you can re-program the PCS for different CPRI rates using the SCI intertace without having to re-gerneate the PCS in IPexpress. In fact, this is what the current CPRI demo does (supports 3 rates via SCI register access). ...

• 766 - SERDES can run at either full-data-rate mode or half-data-rate mode What is the difference between the two?

  With the same reference clock frequency, if the SERDES is configured to half-data-rate mode, the SERDES data rate is only half of the data rate supported in the full-data-rate mode. It is useful when different rates are used for different channels in ...

• 6965 - Serdes/PCS: How to know if the two SerDes data rates can be generated with the same reference clock frequency?

  Description: From FPGA-TN-02245-1-1-CertusPro-NX-SerDes-PCS-User-Guide of the Appendix C. Calculating Parameters for SerDes PLL, it shows the available data rates with respect to the reference clock. However in any case that the desired data rate for ...

• 1179 - When using the Lattice FPGA PCS/SERDES QUADS in 10-bit Raw SERDES mode, how do I do interpret the 10-bit 8b10 encoded RX DATA?

  The response applies to the LatticeECP2M/LatticeECP3/LatticeSC/M PCS/SERDES QUADS used in 10-bit RAW SERDES only mode. The assumption is that you are coding your own RTL 8b10b decoder in the fabric. Based on the definition of 8b10b codes , DATA=0x00 ...

• 2722 - SERDES/ECP3:Why do I receive data errors when I configure the LatticeECP3 SERDES/PCS in TX-to-RX Serial Loopback Mode?

  The TX-to-RX Serial Loopback Mode is supported in the LatticeECP3 device (see "Control Setup" and "TX-to-RX Serial Loopback Mode" sections of FPGA-TN-02190). In this loopback test mode, the TX output serial data is looped back into the RX SERDES CDR. ...