1249 - Lattice Diamond: Synthesis: How do I initialize ORCALUT via Synthesis?<br>
Lattice Diamond: Synthesis: You can define "init" attribute on a specific ORCALUT4 that you want to instantiate. Synthesis will translate the "init" to appropriate "lut_function" in the edif netlist that it writes out. Below is a small example with "init" attribute on ORCALUT4 using Verilog-2001 syntax.
module ex (a,b,c,d,z);
input a,b,c,d;
output z;
ORCALUT4 #(.init(16'h4321)) I1 (.A(a), .B(b), .C(c), .D(d), .Z(z));
endmodule
module ORCALUT4 (A, B, C, D, Z); //synthesis syn_black_box
parameter [15:0]init = 16'h0000 ;
input A ;
input B ;
input C ;
input D ;
output Z ;
endmodule
Note: If the target FPGA Device is SC/SCM device, you must make sure that a blackbox ORCALUT module definition is added to the source as shown in the example above. The synthesis header files for SC/SCM do not include definitions for ORCALUT4/5/6 and synthesis will error out unless appropriate ORCALUT4/5/6 module definitions are added.